Researchers at The Hong Kong Polytechnic University (PolyU) have engineered a novel tunnelling field-effect transistor (TFET) that overcomes the fundamental physical barrier known as the Boltzmann limit, which has long constrained the energy efficiency of conventional transistors. This breakthrough, published in the journal Science, could pave the way for ultra-low-power integrated circuits essential for next-generation AI chips and advanced semiconductor applications.
Conventional transistors rely on thermionic emission, requiring a minimum gate voltage of 60 millivolts (mV) to switch. The Boltzmann limit makes subthreshold swing (SS) values below 60 mV per decade impossible at room temperature, limiting further miniaturization and energy efficiency. Led by Prof. Jianhua HAO, Head of the Department of Physics and Materials and Chair Professor of Materials Physics and Devices at PolyU, the research team utilized quantum tunnelling to circumvent this limit, achieving SS values well below the theoretical threshold.
The team created an ultra-thin heterostructure of 2D bismuth and indium selenide layers using pulsed laser deposition. By precisely controlling the layer structure, the normally semi-metallic bismuth transforms into a semiconductor in its 2D form, enabling charge carriers to tunnel efficiently into indium selenide. Operating at room temperature on silicon substrates, the TFET required a gate-voltage range of only 160 mV, compared to 800 mV in conventional devices, while maintaining a high output current and an exceptionally high ON/OFF current ratio. This combination resolves a long-standing challenge in experimental TFETs, allowing the device to drive multiple downstream logic gates and reduce circuit delay.
The implications are significant. As the semiconductor industry approaches the physical limits of silicon, this innovation offers a viable path to continue improving computing power and energy efficiency. Prof. Hao noted, "By adopting quantum tunnelling, our TFET breaks through this boundary, paving the way for ultra-low-power, high-performance integrated circuits essential for emerging AI chips and advanced semiconductor applications." The research was conducted in collaboration with the National University of Singapore, The Hong Kong University of Science and Technology, Peking University, and the Singapore University of Technology and Design, highlighting the global effort to overcome the limitations of current technology.
This development is particularly timely given the increasing demand for energy-efficient computing in artificial intelligence, data centers, and portable electronics. The ability to reduce power consumption while maintaining high performance could lead to longer battery life in devices and lower operational costs for large-scale computing infrastructure. Moreover, the use of 2D materials and quantum tunnelling represents a departure from traditional semiconductor design, potentially opening new avenues for materials science and device engineering.
As the research progresses, further work will be needed to scale up the manufacturing process and integrate the TFET into commercial chip designs. However, this breakthrough demonstrates that the physical limits of conventional transistors can be surpassed, offering a promising direction for the future of microelectronics.
